Presentation 2013-02-13
A Hardware Implementation of a SAT Solver for Test Generation with Solution Reuse
Toshiya MUKAI, Kenji UEDA, Tsuyoshi IWAGAKI, Hideyuki ICHIHARA, Tomoo INOUE,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper discusses an implementation of a Boolean satisfiability (SAT) solver to solve the test gen-eration problem for a combinational circuit The test generation problem generally contains many large instances which are similar On the other hand, it is important to consider partitioning and solving a large instance under limited hardware resources From the above observations, this work aims at implementing a hardware SAT solver that has the following two functions (1) the function of solution reuse for efficiently solving similar instances and (2) the function of solving partitioned instances for handling a large instance It is expected that the proposed solver with the two functions can efficiently perform test generation compared with a general-parpose solver.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) test generation / Boolean satisfiability (SAT) / hardware SAT solver / solution reuse / instance partitioning
Paper # DC2012-80
Date of Issue

Conference Information
Committee DC
Conference Date 2013/2/6(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Hardware Implementation of a SAT Solver for Test Generation with Solution Reuse
Sub Title (in English)
Keyword(1) test generation
Keyword(2) Boolean satisfiability (SAT)
Keyword(3) hardware SAT solver
Keyword(4) solution reuse
Keyword(5) instance partitioning
1st Author's Name Toshiya MUKAI
1st Author's Affiliation Graduate School of Information Sciences, Hiroshima City University()
2nd Author's Name Kenji UEDA
2nd Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
3rd Author's Name Tsuyoshi IWAGAKI
3rd Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
4th Author's Name Hideyuki ICHIHARA
4th Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
5th Author's Name Tomoo INOUE
5th Author's Affiliation Graduate School of Information Sciences, Hiroshima City University
Date 2013-02-13
Paper # DC2012-80
Volume (vol) vol.112
Number (no) 429
Page pp.pp.-
#Pages 7
Date of Issue