| Presentation | 2013-01-17 Design and Implementation of High Performance Stencil Computer by using Mesh Connected FPGA Arrays Ryohei KOBAYASHI, Shinya TAKAMAEDA-YAMAZAKI, Kenji KISE, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We develop an effective stencil computation accelerator by using multiple FPGAs, which employs 2D-mesh architecture connecting multiple small FPGAs. On the process of the development, there is a trouble that the system generates an illegal computation result when the multiple FPGA nodes are used. The cause of it is clock period variation. This paper describes a quantitative evaluation result of clock variations for every FPGA node and the design and implementation of a mechanism to operate the system successfully. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Stencil Computation / Clock-Domain / Synchronization Mechanism |
| Paper # | VLD2012-134,CPSY2012-83,RECONF2012-88 |
| Date of Issue |
| Conference Information | |
| Committee | RECONF |
|---|---|
| Conference Date | 2013/1/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and Implementation of High Performance Stencil Computer by using Mesh Connected FPGA Arrays |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Stencil Computation |
| Keyword(3) | Clock-Domain |
| Keyword(4) | Synchronization Mechanism |
| 1st Author's Name | Ryohei KOBAYASHI |
| 1st Author's Affiliation | Graduate School of Information Science and Engineering Tokyo Institute of Technology() |
| 2nd Author's Name | Shinya TAKAMAEDA-YAMAZAKI |
| 2nd Author's Affiliation | Graduate School of Information Science and Engineering Tokyo Institute of Technology |
| 3rd Author's Name | Kenji KISE |
| 3rd Author's Affiliation | Graduate School of Information Science and Engineering Tokyo Institute of Technology |
| Date | 2013-01-17 |
| Paper # | VLD2012-134,CPSY2012-83,RECONF2012-88 |
| Volume (vol) | vol.112 |
| Number (no) | 377 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |