Presentation	2013-01-10 Examination of Reduction Technique for Radiation Noise from Power Supply Layers in the PCB : Configration of Power Supply Layers ,
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Abstract(in English)	Recently, the operation speed-up of IC is advanced along with the development of the information society. The highspeed switching operation of IC causes the power source noise, and becomes a problem because it originates in it and it is generated In our laboratory. We are advancing examination of the substrate end resistance addition method for the purpose of radiation noise reduction. Currently, I'm advancing application evaluation in a substrate which is different in the form ofa Vcc layer and a GND layer. This time, I report evaluation results that applyed to Substrate having a Vcc layer with "L" and a "コ" character type.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	PCB / Radiation Noise / Standing Noise Wave / Adding Resistor Technique / Matching Resistor
Paper #	EMCJ2012-114
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Conference Information
Committee	EMCJ
Conference Date	2013/1/3(1days)
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Paper Information
Registration To	Electromagnetic Compatibility (EMCJ)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Examination of Reduction Technique for Radiation Noise from Power Supply Layers in the PCB : Configration of Power Supply Layers
Sub Title (in English)
Keyword(1)	PCB
Keyword(2)	Radiation Noise
Keyword(3)	Standing Noise Wave
Keyword(4)	Adding Resistor Technique
Keyword(5)	Matching Resistor
1st Author's Name
1st Author's Affiliation	()
Date	2013-01-10
Paper #	EMCJ2012-114
Volume (vol)	vol.112
Number (no)	372
Page	pp.pp.-
#Pages	6
Date of Issue