Presentation | 2013/3/6 Accuracy Evaluation of Trace-based Cache Simulation for Two-core L1 Caches TAWADA MASASHI, YANAGISAWA MASAO, TOGAWA NOZOMU, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In trace-based cache simulation, we perform cache simulation based on a particular memor/access trace obtained by cycle-accurate memory simulation. While cycle-accurate simulation takes too many time to run, trace-based cache simulation runs very fast and then we can evaluate many cache configurations in a short time. Let us consider a multi-core processor cache. We can obtain a memory access trace by using a cycle-accurate memory simulation but it can be changed when we consider another multi-core processor cache configuration. One of the main concerns in trace-based cache simulation applied to multi-core processor caches is its accuracy when the cache configuration that the memory access trace assumed is different from those the trace-based cache simulation targets. In this paper, we evaluate how much memory access traces affect cache configuration simulation when cache configurations simulated are different from the one that memory access traces assume, using several benchmark applications. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | cache memory / cache simulation / trace-based simulation |
Paper # | Vol.2013-SLDM-160 No.15,Vol.2013-EMB-28 No.15 |
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Conference Information | |
Committee | DC |
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Conference Date | 2013/3/6(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Accuracy Evaluation of Trace-based Cache Simulation for Two-core L1 Caches |
Sub Title (in English) | |
Keyword(1) | cache memory |
Keyword(2) | cache simulation |
Keyword(3) | trace-based simulation |
1st Author's Name | TAWADA MASASHI |
1st Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University() |
2nd Author's Name | YANAGISAWA MASAO |
2nd Author's Affiliation | Dept. of Electronic and Photonic Systems, Waseda University |
3rd Author's Name | TOGAWA NOZOMU |
3rd Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
Date | 2013/3/6 |
Paper # | Vol.2013-SLDM-160 No.15,Vol.2013-EMB-28 No.15 |
Volume (vol) | vol.112 |
Number (no) | 482 |
Page | pp.pp.- |
#Pages | 6 |
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