| Presentation | 2013-03-07 Performance Evaluation of a Combination of Sum-Product and Two-bit Bit Flipping Decoding Algorithms Koh MATSUSHITA, Hiroshi KAMABE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A Bit-Flipping algorith which uses only two bits for each node has been proposed. The bit error proba- bility of the method is very close to that of the sum-product algorithm for binary symmetric channels at high SNR region. We show that the performance of a combination of sum-product decoding and two-bit bit flipping decoding when the method is applied to additive white gaussian noise channels. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | LDPC codes / Sum-Product Algorithm / Bit-Flipping Algorithm / Bias Terms |
| Paper # | IT2012-72,ISEC2012-90,WBS2012-58 |
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| Conference Information | |
| Committee | ISEC |
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| Conference Date | 2013/2/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Information Security (ISEC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance Evaluation of a Combination of Sum-Product and Two-bit Bit Flipping Decoding Algorithms |
| Sub Title (in English) | |
| Keyword(1) | LDPC codes |
| Keyword(2) | Sum-Product Algorithm |
| Keyword(3) | Bit-Flipping Algorithm |
| Keyword(4) | Bias Terms |
| 1st Author's Name | Koh MATSUSHITA |
| 1st Author's Affiliation | Graduate School of Infomation Science, Gifu University.() |
| 2nd Author's Name | Hiroshi KAMABE |
| 2nd Author's Affiliation | Graduate School of Infomation Science, Gifu University. |
| Date | 2013-03-07 |
| Paper # | IT2012-72,ISEC2012-90,WBS2012-58 |
| Volume (vol) | vol.112 |
| Number (no) | 461 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |