Presentation 2012-09-19
A Design Framework for Reconfigurable IPs with VLSI CADs
Qian ZHAO, Kazuki INOUE, Motoki AMAGASAKI, Masahiro IIDA, Toshinori SUEYOSHI,
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Abstract(in English) The conventional FPGA design CAD flows evaluate FPGA architecture by implementing benchmarks through the following steps:synthesis, technology mapping, clustering and placement and routing (P&R). The area and timing performance reports are derived from the P&R tool. The accuracy of the result is low but proved enough to evaluate architectures fairly. However, for a complete FPGA IP design, the architecture should be evaluated with standard cells by the full back-end design flow. We proposed a new FPGA routing tool, namely EasyRouter. By using simple HDL templates, the EasyRouter can automatically generate entire chip HDL codes and the configuration bitstream according to architecture definition and routing result. With these files, the FPGA IP can be evaluated with commercial VLSI CADs in high accuracy and reliability.
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Keyword(in English) FPGA / CAD / Routing
Paper # RECONF2012-41
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Conference Information
Committee RECONF
Conference Date 2012/9/11(1days)
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Registration To Reconfigurable Systems (RECONF)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Design Framework for Reconfigurable IPs with VLSI CADs
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) CAD
Keyword(3) Routing
1st Author's Name Qian ZHAO
1st Author's Affiliation Graduate School of Science and Technology Kumamoto University()
2nd Author's Name Kazuki INOUE
2nd Author's Affiliation Graduate School of Science and Technology Kumamoto University
3rd Author's Name Motoki AMAGASAKI
3rd Author's Affiliation Graduate School of Science and Technology Kumamoto University
4th Author's Name Masahiro IIDA
4th Author's Affiliation Graduate School of Science and Technology Kumamoto University
5th Author's Name Toshinori SUEYOSHI
5th Author's Affiliation Graduate School of Science and Technology Kumamoto University
Date 2012-09-19
Paper # RECONF2012-41
Volume (vol) vol.112
Number (no) 203
Page pp.pp.-
#Pages 6
Date of Issue