| Presentation | 2012-09-18 Architecture of an Asynchronous FPGA for Handshake-Component-Based Design Masanori HARIYAMA, Yoshiya KOMATSU, Michitaka KAMEYAMA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a novel architecture of an asynchronous FPGA for handshake-component-based design. The handshake-component-based design is suitable for large-scale, complex asynchronous circuit because of its understandability. This paper proposes an area-efficient architecture of an FPGA that is suitable for handshake- component-based asynchronous circuit. Moreover, the Four-Phase Dual-Rail encoding is employed to construct circuits robust to delay variation because the data paths are programmable in FPGA. The FPGA based on the proposed architecture is implemented in a 65nm process. Its evaluation results show that the proposed FPGA can implement complex asynchronous circuits efficiently. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Reconfigurable LSI / Self-timed circuit / Asynchronous circuit / Balsa |
| Paper # | RECONF2012-31 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2012/9/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Architecture of an Asynchronous FPGA for Handshake-Component-Based Design |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Reconfigurable LSI |
| Keyword(3) | Self-timed circuit |
| Keyword(4) | Asynchronous circuit |
| Keyword(5) | Balsa |
| 1st Author's Name | Masanori HARIYAMA |
| 1st Author's Affiliation | Graduate School of Information Sciences Tohoku University() |
| 2nd Author's Name | Yoshiya KOMATSU |
| 2nd Author's Affiliation | Graduate School of Information Sciences Tohoku University |
| 3rd Author's Name | Michitaka KAMEYAMA |
| 3rd Author's Affiliation | Graduate School of Information Sciences Tohoku University |
| Date | 2012-09-18 |
| Paper # | RECONF2012-31 |
| Volume (vol) | vol.112 |
| Number (no) | 203 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |