| Presentation | 2012-09-18 Area-Efficient Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs Masanori HARIYAMA, Yoshiya KOMATSU, Michitaka KAMEYAMA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents an efficient asynchronous design methodology for synchronous FPGAs. The mixed synchronous/asynchronous design is the best way to minimize the power consumption of a circuit implemented on asynchronous FPGA. For asynchronous circuit synthesis, Balsa was proposed. However, the problem is that circuits synthesized from Balsa description need a lot of logic resources. To solve this problem, we propose two optimization methods for gate-level netlist. First, we introduce an area-efficient C-element suitable for FPGAs. Then, we propose optimization methods for an adder with a carry input and constant adder. The evaluation results show that theproposed method reduces the logic resource consumption by 26% to 47%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Reconfigurable LSI / Self-timed circuit / Asynchronous circuit / Balsa |
| Paper # | RECONF2012-30 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2012/9/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Area-Efficient Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Reconfigurable LSI |
| Keyword(3) | Self-timed circuit |
| Keyword(4) | Asynchronous circuit |
| Keyword(5) | Balsa |
| 1st Author's Name | Masanori HARIYAMA |
| 1st Author's Affiliation | Graduate School of Information Sciences Tohoku University() |
| 2nd Author's Name | Yoshiya KOMATSU |
| 2nd Author's Affiliation | Graduate School of Information Sciences Tohoku University |
| 3rd Author's Name | Michitaka KAMEYAMA |
| 3rd Author's Affiliation | Graduate School of Information Sciences Tohoku University |
| Date | 2012-09-18 |
| Paper # | RECONF2012-30 |
| Volume (vol) | vol.112 |
| Number (no) | 203 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |