Presentation 2012-09-28
A design of self noise matching circuit for compact MIMO system
Jaeho JEONG, KhanhTran GIA, Kiyomichi ARAKI,
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Abstract(in English) The impedance matching problem in the presence of signal and noise coupling in compact MIMO arrays is addressed. For maximizing ergodic capacity, the matching network is employed for matching between arbitrary impedance and desired impedance. Since optimal matching circuit has a problem to realize in practice, this paper presents that self matching method with minimization determinant of noise figure is derived based on a symmetrical antenna and identical front-end characteristic. Also, realization of various matching circuits is considered and circuit parameter of sub optimal matching is calculated in specific example.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Self matching / Sub optimal matching / MIMO / Noise figure
Paper # MW2012-80
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Committee MW
Conference Date 2012/9/20(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A design of self noise matching circuit for compact MIMO system
Sub Title (in English)
Keyword(1) Self matching
Keyword(2) Sub optimal matching
Keyword(3) MIMO
Keyword(4) Noise figure
1st Author's Name Jaeho JEONG
1st Author's Affiliation Department of Electrical and Electronic Engineering Tokyo Institute of Technology()
2nd Author's Name KhanhTran GIA
2nd Author's Affiliation Department of Electrical and Electronic Engineering Tokyo Institute of Technology
3rd Author's Name Kiyomichi ARAKI
3rd Author's Affiliation Department of Electrical and Electronic Engineering Tokyo Institute of Technology
Date 2012-09-28
Paper # MW2012-80
Volume (vol) vol.112
Number (no) 217
Page pp.pp.-
#Pages 6
Date of Issue