| Presentation | 2012-11-27 A novel efficient data structure representing shared DAG patterns Yusuke MATSUNAGA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Technology mapping and local rewriting in logic synthesis use many small size DAG patterns. Even though they share the identical sub-graphs to reduce the total memory usage, still it is not enough in many cases. This paper proposes a novel data structure representing a set of DAG patterns compactly with NP transform attributes added to edges. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | logic synthesis / AIG(AND-INVERTER-GRAPH) / NPN equivalent class |
| Paper # | VLD2012-86,DC2012-52 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2012/11/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A novel efficient data structure representing shared DAG patterns |
| Sub Title (in English) | |
| Keyword(1) | logic synthesis |
| Keyword(2) | AIG(AND-INVERTER-GRAPH) |
| Keyword(3) | NPN equivalent class |
| 1st Author's Name | Yusuke MATSUNAGA |
| 1st Author's Affiliation | Faculty of Information Science and Electorical Engineering, Kyushu University() |
| Date | 2012-11-27 |
| Paper # | VLD2012-86,DC2012-52 |
| Volume (vol) | vol.112 |
| Number (no) | 321 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |