Presentation 2012-11-26
Scalar replacement with exact analysis of array accesses
Hiroaki TAKEHANA, Kenshu SETO,
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Abstract(in English) Reduction of array accesses in C descriptions is often an effective way to generate high performance RTL descriptions. Scalar replacement is one of the effective techniques to reduce array accesses, however, the state-of-the-art scalar replacement technique has three drawbacks: (1) it may add redundant registers since it does not consider the execution conditions of array accesses, (2) it may introduce many registers and (3) it may increase the complexity of C descriptions to initialize registers. In this paper, we propose scalar replacement techniques to resolve the above problems. We tested our approach for benchmark programs, and we found that the proposed techniques generate hardware with up to 77.6% less area than those generated by a previous method without sacrificing performance.
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Keyword(in English) scalar replacement / high level synthesis
Paper # VLD2012-60,DC2012-26
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Committee DC
Conference Date 2012/11/19(1days)
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Language JPN
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Title (in English) Scalar replacement with exact analysis of array accesses
Sub Title (in English)
Keyword(1) scalar replacement
Keyword(2) high level synthesis
1st Author's Name Hiroaki TAKEHANA
1st Author's Affiliation Faculty of Engineering, Tokyo City University()
2nd Author's Name Kenshu SETO
2nd Author's Affiliation Faculty of Engineering, Tokyo City University
Date 2012-11-26
Paper # VLD2012-60,DC2012-26
Volume (vol) vol.112
Number (no) 321
Page pp.pp.-
#Pages 6
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