Presentation 2012-11-28
Chip Design and Performance evaluation of Via Programmable Analog Circuit
Keisuke UEDA, Ryo NAKAZAWA, Ryouhei HORI, Mitsuru SHIOZAKI, Tomohiro FUJITA, Takeshi FUJINO,
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Abstract(in English) Recently, programmable analog circuits are started to be used because initial development cost including mask cost is reduced, and chip design is easy. In order to achieve high performance with lower power consumption, we have proposed a Via Programmable Analog (VPA)which customizes the characteristics of analog circuit by changing via masks. The target application of VPA is the analog front-end circuit for various kinds of sensors. In this paper, we have designed VPA test chip using 0.18μmCMOS process. The gain of inverting and non-inverting amplifier can be changed by the via programmable resistance. Experimental results show that the chip output the proper waveform with the programmed gain to the input.
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Keyword(in English) Field Programmable / Via Programmable Analog (VPA) / tunable amplifier
Paper # CPM2012-121,ICD2012-85
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Conference Date 2012/11/20(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Chip Design and Performance evaluation of Via Programmable Analog Circuit
Sub Title (in English)
Keyword(1) Field Programmable
Keyword(2) Via Programmable Analog (VPA)
Keyword(3) tunable amplifier
1st Author's Name Keisuke UEDA
1st Author's Affiliation Graduate School of Science and Engineering, Ritsumeikan University()
2nd Author's Name Ryo NAKAZAWA
2nd Author's Affiliation Research Organization of Science & Engineering, Ritsumeikan University
3rd Author's Name Ryouhei HORI
3rd Author's Affiliation Graduate School of Science and Engineering, Ritsumeikan University
4th Author's Name Mitsuru SHIOZAKI
4th Author's Affiliation Research Organization of Science & Engineering, Ritsumeikan University
5th Author's Name Tomohiro FUJITA
5th Author's Affiliation Faculty of Science and Engineering, Ritsumeikan University
6th Author's Name Takeshi FUJINO
6th Author's Affiliation Faculty of Science and Engineering, Ritsumeikan University
Date 2012-11-28
Paper # CPM2012-121,ICD2012-85
Volume (vol) vol.112
Number (no) 324
Page pp.pp.-
#Pages 6
Date of Issue