Presentation 2012-11-27
Expectations to 2.5D/3D Package and Challenges on Package Design
Hiroyuki MORI, Kazushige TORIYAMA, Yasumitsu ORII,
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Abstract(in English) Since internet becomes common and it is widely utilized, the quantity of the data to be handled rapidly grows up. In order to deal with such huge data, the role of a high performance computer and a portable device is very important. However, it is said that the data bandwidth for the device-device communication is not enough in order for high speed computing. At same time, the power consumption of the device is also restricting a device performance improvement. A 2.5D/3D stacked device structure has been proposed and it contributes to expand the bandwidth, to reduce the power consumption of the device and to miniaturize the product. Also, it makes much of benefit for applications. In this paper, the expectations to the 2.5D/3D stacked device and the challenges to the such package design are discussed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Stacked device / 2.5D / 3D / Silicon interposer
Paper # CPM2012-114,ICD2012-78
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Committee CPM
Conference Date 2012/11/20(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Expectations to 2.5D/3D Package and Challenges on Package Design
Sub Title (in English)
Keyword(1) Stacked device
Keyword(2) 2.5D
Keyword(3) 3D
Keyword(4) Silicon interposer
1st Author's Name Hiroyuki MORI
1st Author's Affiliation Science & Technology, IBM Research Tokyo, IBM Japan, Ltd.()
2nd Author's Name Kazushige TORIYAMA
2nd Author's Affiliation Science & Technology, IBM Research Tokyo, IBM Japan, Ltd.
3rd Author's Name Yasumitsu ORII
3rd Author's Affiliation Science & Technology, IBM Research Tokyo, IBM Japan, Ltd.
Date 2012-11-27
Paper # CPM2012-114,ICD2012-78
Volume (vol) vol.112
Number (no) 323
Page pp.pp.-
#Pages 4
Date of Issue