Presentation 2012-11-27
High-Speed Interconnect Technologies
Yutaka UEMATSU, Go SHINKAI, Satoshi MURAOKA, Masayoshi YAGYU, Hideki OSAKA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) With the need for faster communication speed, transmission performance increase of twice per 2 years is also required for the IT equipment. More than 10Gbps, the deterioration of the signal waveform due to transmission loss and various noise make it difficult to maintain high reliability of the system in the case of board to board transmission that has 60cm~100cm wiring length. In this report, high speed interconnect technologies, such as channel, driver/receiver circuit, and design, for transmission of reliable electrical signals in excess of 5~10Gbps are introduced and discussed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) High-speed Interconnect / Inter Symbol Interference / Equalizing / Power Supply noise
Paper # CPM2012-112,ICD2012-76
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Conference Information
Committee CPM
Conference Date 2012/11/20(1days)
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Registration To Component Parts and Materials (CPM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) High-Speed Interconnect Technologies
Sub Title (in English)
Keyword(1) High-speed Interconnect
Keyword(2) Inter Symbol Interference
Keyword(3) Equalizing
Keyword(4) Power Supply noise
1st Author's Name Yutaka UEMATSU
1st Author's Affiliation Yokohama Laboratory, Hitachi Ltd.()
2nd Author's Name Go SHINKAI
2nd Author's Affiliation Yokohama Laboratory, Hitachi Ltd.
3rd Author's Name Satoshi MURAOKA
3rd Author's Affiliation Yokohama Laboratory, Hitachi Ltd.
4th Author's Name Masayoshi YAGYU
4th Author's Affiliation Yokohama Laboratory, Hitachi Ltd.
5th Author's Name Hideki OSAKA
5th Author's Affiliation Yokohama Laboratory, Hitachi Ltd.
Date 2012-11-27
Paper # CPM2012-112,ICD2012-76
Volume (vol) vol.112
Number (no) 323
Page pp.pp.-
#Pages 6
Date of Issue