Presentation 2012-10-26
Investigation of Operation Performance of a Semiconductor-Integrated SOA-MZI-Type All-Optical Flip-Flop Circuit with a Feedback Loop
Yusuke Naito, Satoshi Shimizu, Tomoyuki Kato, Kohroh Kobayashi, Hiroyuki UENOHARA,
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Abstract(in English) A semiconductor monolithic integrated all-optical flip-flop circuit with a feedback loop is expected to have several superior characteristics such as high-speed, wide wavelength bandwidth, and low polarization dependence, and to be applied to optical gate control pulse generation and optical label recognition. The reported results so far, however, has been a structure with a fiber-based feedback loop integrated with a SOA-MZI, and thus the operation performance was obtained for several tens of nanosecond wide input pulses. Therefore, we investigated the improvement with a semiconductor monolithic integration structure for the purpose of achieving operation with several tens of picosecond input pulses. Firstly, operation performance was simulated by solving rate equations using the model taking wavelength and carrier density dependent gain into consideration, and operation conditions for achieving both set and reset was investigated. Secondly, flip-flop operation with 34 and 18ps wide input pulses were obtained experimentally.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) All-optical flip-flop circuit / SOA-MZI / semiconductor monolithic integration / feedback loop
Paper # OCS2012-61,OPE2012-112,LQE2012-78
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Conference Information
Committee OPE
Conference Date 2012/10/18(1days)
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Paper Information
Registration To Optoelectronics (OPE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Investigation of Operation Performance of a Semiconductor-Integrated SOA-MZI-Type All-Optical Flip-Flop Circuit with a Feedback Loop
Sub Title (in English)
Keyword(1) All-optical flip-flop circuit
Keyword(2) SOA-MZI
Keyword(3) semiconductor monolithic integration
Keyword(4) feedback loop
1st Author's Name Yusuke Naito
1st Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institute of Technology()
2nd Author's Name Satoshi Shimizu
2nd Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institute of Technology
3rd Author's Name Tomoyuki Kato
3rd Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institute of Technology
4th Author's Name Kohroh Kobayashi
4th Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institute of Technology
5th Author's Name Hiroyuki UENOHARA
5th Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institute of Technology
Date 2012-10-26
Paper # OCS2012-61,OPE2012-112,LQE2012-78
Volume (vol) vol.112
Number (no) 259
Page pp.pp.-
#Pages 6
Date of Issue