| Presentation | 2012-08-02 Static noise margin and energy performance analyses of a nonvolatile SRAM cell using pseudo-spin-MOSFET Yusuke SHUTO, Shuu'ichirou YAMAMOTO, Satoshi SUGAHARA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We proposed a new nonvolatile SRAM (NV-SRAM) cell and a nonvolatile FF (NV-FF) using pseudo-spin-MOSFETs (that can be configured with an ordinary MOSFET and a ferromagnetic tunnel junction), which are adaptable to the present CMOS technology, and we also proposed nonvolatile power-gating (NVPG) employing the NV-SRAM and NV-FF circuits as a standby-power reduction architecture. In this study, the static noise margin and energy performance of the NV-SRAM cell using pseudo-spin-MOSFETs were analyzed in detail, and microarchitectures for improving these properties were also developed. The NV-SRAM cell with the proposed microarchitectures is promising for highly energy-efficient NVPG systems. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CMOS/spintronics hybrid technology / Power-gating / Nonvolatile SRAM / Nonvolatile flip-flop / Pseudo-spin-MOSFET / Spin-transistor architecture |
| Paper # | SDM2012-75,ICD2012-43 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2012/7/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Static noise margin and energy performance analyses of a nonvolatile SRAM cell using pseudo-spin-MOSFET |
| Sub Title (in English) | |
| Keyword(1) | CMOS/spintronics hybrid technology |
| Keyword(2) | Power-gating |
| Keyword(3) | Nonvolatile SRAM |
| Keyword(4) | Nonvolatile flip-flop |
| Keyword(5) | Pseudo-spin-MOSFET |
| Keyword(6) | Spin-transistor architecture |
| 1st Author's Name | Yusuke SHUTO |
| 1st Author's Affiliation | ISEL, Tokyo Inst. of Tech.:CREST, JST:KAST, KSP() |
| 2nd Author's Name | Shuu'ichirou YAMAMOTO |
| 2nd Author's Affiliation | IGS, Tokyo Inst. of Tech.:CREST, JST |
| 3rd Author's Name | Satoshi SUGAHARA |
| 3rd Author's Affiliation | ISEL, Tokyo Inst. of Tech.:CREST, JST |
| Date | 2012-08-02 |
| Paper # | SDM2012-75,ICD2012-43 |
| Volume (vol) | vol.112 |
| Number (no) | 170 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |