| Presentation | 2012-08-02 10nm-Diameter Tri-Gate Silicon Nanowire MOSFETs with Enhanced High-Field Transport and V_ | Tunability through Thin BOX Kensuke Ota, Masumi Saitoh, Chika Tanaka, Ken Uchida, Toshinori Numata, | |
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| Abstract(in Japanese) | (See Japanese page) | ||
| Abstract(in English) | We demonstrate high-performance 10nm-diameter tri-gate nanowire transistors (NW Tr.) with V_ | tunability, small variability and negligible self-heating. Optimized S/D and stress memorization technique (SMT) lead to significant parasitic resistance reduction and mobility enhancement. Saturation velocity increase by SMT further enhances high-field carrier velocity and I_| control in tri-gate NW Tr. with thin BOX for the first time. The degradation of body effect by NW narrowing can be recovered by thinning NW height, enabling dynamic power and performance management.
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| Keyword(in Japanese) | (See Japanese page) | ||
| Keyword(in English) | MOSFET / Nanowire / threshold voltage control / thin BOX | ||
| Paper # | SDM2012-70,ICD2012-38 | ||
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2012/7/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | ||
| Registration To | Integrated Circuits and Devices (ICD) | |
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| Language | JPN | |
| Title (in Japanese) | (See Japanese page) | |
| Sub Title (in Japanese) | (See Japanese page) | |
| Title (in English) | 10nm-Diameter Tri-Gate Silicon Nanowire MOSFETs with Enhanced High-Field Transport and V_ | Tunability through Thin BOX |
| Sub Title (in English) | ||
| Keyword(1) | MOSFET | |
| Keyword(2) | Nanowire | |
| Keyword(3) | threshold voltage control | |
| Keyword(4) | thin BOX | |
| 1st Author's Name | Kensuke Ota | |
| 1st Author's Affiliation | Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation() | |
| 2nd Author's Name | Masumi Saitoh | |
| 2nd Author's Affiliation | Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation | |
| 3rd Author's Name | Chika Tanaka | |
| 3rd Author's Affiliation | Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation | |
| 4th Author's Name | Ken Uchida | |
| 4th Author's Affiliation | Tokyo Institute of Technology | |
| 5th Author's Name | Toshinori Numata | |
| 5th Author's Affiliation | Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation | |
| Date | 2012-08-02 | |
| Paper # | SDM2012-70,ICD2012-38 | |
| Volume (vol) | vol.112 | |
| Number (no) | 170 | |
| Page | pp.pp.- | |
| #Pages | 6 | |
| Date of Issue | ||