Presentation 2012-07-26
Investigation of Accelerating FDTD Microwave Solver by Using GPGPU-No.3
Nagayoshi MORITA,
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Abstract(in English) The author has been investigating the problems of accelerating, through the use of GPGPU, FDTD simulator solvers for analyzing MMIC passive element circuit characteristics. This report presents an FDTD algorithm using GPGPU that can perform field calculation in the region with absorbing boundary layers of CFSPML (Complex Frequency Shifted Perfectly Matched Layer) and also obtain S parameter values based on voltages and currents on the input and output lines. Even if field distribution data on several planes at some three time steps are additionally calculated, the total computation time required is at least several times shorter than for the GPU-less calculation.
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Keyword(in English) MMIC passive elements / GPGPU / FDTD / S parameters / CFSPML
Paper # MW2012-33,OPE2012-26,EST2012-15,MWP2012-14
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Committee EST
Conference Date 2012/7/19(1days)
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Registration To Electronic Simulation Technology (EST)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Investigation of Accelerating FDTD Microwave Solver by Using GPGPU-No.3
Sub Title (in English)
Keyword(1) MMIC passive elements
Keyword(2) GPGPU
Keyword(3) FDTD
Keyword(4) S parameters
Keyword(5) CFSPML
1st Author's Name Nagayoshi MORITA
1st Author's Affiliation M Wave Solver Lab()
Date 2012-07-26
Paper # MW2012-33,OPE2012-26,EST2012-15,MWP2012-14
Volume (vol) vol.112
Number (no) 157
Page pp.pp.-
#Pages 6
Date of Issue