| Presentation | 2012-07-26 BER Calculation Modeling for 10G-EPON Systems Namiko Ikeda, Kazuhiko Terada, Hiroyuki Uzawa, Akihiko Miyazaki, Satoshi Shigematsu, Masami Urano, Tsugumichi Shibata, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In 10G-EPON systems, the high speed access networks in the next generation, the upper limits of the bit error rate (BER) are defined at the physical sub-layer (PHY) service interface after decoding (FEC decode, descramble, and 64B/66B decode) by the IEEE802.3av standard. In this paper, we propose a new BER measurement method in the interface and a new BER calculation model for verifying the proposed method. The proposed method calculates the BER of all frames by counting the number of error bits in frames received at the OLT and by estimating the number of error bits in discarded frames using the rate of discarded frames in an upstream direction. The BER calculation model is composed of functions generating and transmitting frames to an ONU, encoding and decoding at the ONU and the OLT, and attenuating in a fiber between the ONU and the OLT. This model is verified using the frame error rate which can be obtained without any estimation. Using the model, we verified that the proposed method precisely calculates the BER over a wide range, including around 10^<-3>, which conventional methods cannot do, and the BER is measured using the evaluating board of the 10G-EPON system. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 10G-EPON / Bit Error Rate / Modeling |
| Paper # | MW2012-31,OPE2012-24,EST2012-13,MWP2012-12 |
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| Conference Information | |
| Committee | EST |
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| Conference Date | 2012/7/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electronic Simulation Technology (EST) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | BER Calculation Modeling for 10G-EPON Systems |
| Sub Title (in English) | |
| Keyword(1) | 10G-EPON |
| Keyword(2) | Bit Error Rate |
| Keyword(3) | Modeling |
| 1st Author's Name | Namiko Ikeda |
| 1st Author's Affiliation | NTT Microsystem Integration Laboratories() |
| 2nd Author's Name | Kazuhiko Terada |
| 2nd Author's Affiliation | NTT Microsystem Integration Laboratories |
| 3rd Author's Name | Hiroyuki Uzawa |
| 3rd Author's Affiliation | NTT Microsystem Integration Laboratories |
| 4th Author's Name | Akihiko Miyazaki |
| 4th Author's Affiliation | NTT Microsystem Integration Laboratories |
| 5th Author's Name | Satoshi Shigematsu |
| 5th Author's Affiliation | NTT Microsystem Integration Laboratories |
| 6th Author's Name | Masami Urano |
| 6th Author's Affiliation | NTT Microsystem Integration Laboratories |
| 7th Author's Name | Tsugumichi Shibata |
| 7th Author's Affiliation | NTT Microsystem Integration Laboratories |
| Date | 2012-07-26 |
| Paper # | MW2012-31,OPE2012-24,EST2012-13,MWP2012-12 |
| Volume (vol) | vol.112 |
| Number (no) | 157 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |