| Presentation | 2012-07-03 The Road to Normally-Off Computing Hiroshi NAKAMURA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Low Power Consumption / Non-Volatile Memory / Power Gating / Co-Design / Memory Hierarchy |
| Paper # | CAS2012-22,VLD2012-32,SIP2012-54,MSS2012-22 |
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| Conference Information | |
| Committee | MSS |
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| Conference Date | 2012/6/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Mathematical Systems Science and its applications(MSS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | The Road to Normally-Off Computing |
| Sub Title (in English) | |
| Keyword(1) | Low Power Consumption |
| Keyword(2) | Non-Volatile Memory |
| Keyword(3) | Power Gating |
| Keyword(4) | Co-Design |
| Keyword(5) | Memory Hierarchy |
| 1st Author's Name | Hiroshi NAKAMURA |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, The University of Tokyo() |
| Date | 2012-07-03 |
| Paper # | CAS2012-22,VLD2012-32,SIP2012-54,MSS2012-22 |
| Volume (vol) | vol.112 |
| Number (no) | 116 |
| Page | pp.pp.- |
| #Pages | 121 |
| Date of Issue | |