| Presentation | 2012-06-14 High-Speed and Low-Power Design of a Singular Value Decomposition Processor for SVD-MIMO-OFDM Systems Hiroki IWAIZUMI, Shingo YOSHIZAWA, Yoshikazu MIYANAGA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose a processor for singular value decomposition (SVD) and compression/reconstruction of feedback matrix, which is mandatory for SVD - multiple-input multiple-output - orthogonal frequency division multiplexing(MIMO-OFDM) systems. The SVD-MIMO is a transmission method, which can suppress multi-stream interference and improve communication quality by beamforming. Because of high calculation cost, any conventional SVD processors are unsuitable for real-time processing. We have employed an application specific instruction-set processor(ASIP) architecture and have realized the high-speed/low-power design and realtime processing by the parallelization of floating point unit(FPU) and arithmetic instructions specialized in complex matrix operations. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SVD-MIMO / Singular value decomposition / ASIP / FPU |
| Paper # | SIS2012-3 |
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| Conference Information | |
| Committee | SIS |
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| Conference Date | 2012/6/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Smart Info-Media Systems (SIS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High-Speed and Low-Power Design of a Singular Value Decomposition Processor for SVD-MIMO-OFDM Systems |
| Sub Title (in English) | |
| Keyword(1) | SVD-MIMO |
| Keyword(2) | Singular value decomposition |
| Keyword(3) | ASIP |
| Keyword(4) | FPU |
| 1st Author's Name | Hiroki IWAIZUMI |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido University() |
| 2nd Author's Name | Shingo YOSHIZAWA |
| 2nd Author's Affiliation | Faculty of Engineering, Kitami Institute of Technology |
| 3rd Author's Name | Yoshikazu MIYANAGA |
| 3rd Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido University |
| Date | 2012-06-14 |
| Paper # | SIS2012-3 |
| Volume (vol) | vol.112 |
| Number (no) | 78 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |