Presentation 2012-05-29
Hard error avoidance for TMR module using dynamic relocation in an FPGA
Hiroki TANAKA, Yoshihiro ICHINOMIYA, Sadaki USAGAWA, Motoki AMAGASAKI, Masahiro IIDA, Morihiro KUGA, Toshinori SUEYOSHI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) FPGA can recover from hard-error by reconfiguring itself, avoiding the hard-error part. Especially, the fault recovery can dynamically recover by using partial reconfiguration. However, partial reconfiguration data is required to perform partial reconfiguration and extra memory resource is required. Therefore, we proposed the self-recovery system which combined triple module redundancy and relocation of partial reconfiguration data in an FPGA. While hard-error is concealed by triple module redundancy, proposed system dynamically recovers by relocating partial reconfiguration data of correct module on spare region. As a verification result, we checked that the proposed system could recover from hard-error by relocating in an FPGA.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Softcore Processor System / Hard Error / Partial Reconfiguration / Bitstream Relocation / Self-Repair
Paper # RECONF2012-11
Date of Issue

Conference Information
Committee AI
Conference Date 2012/5/22(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Artificial Intelligence and Knowledge-Based Processing (AI)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Hard error avoidance for TMR module using dynamic relocation in an FPGA
Sub Title (in English)
Keyword(1) Softcore Processor System
Keyword(2) Hard Error
Keyword(3) Partial Reconfiguration
Keyword(4) Bitstream Relocation
Keyword(5) Self-Repair
1st Author's Name Hiroki TANAKA
1st Author's Affiliation Graduate School of Science and Technology, Kumamoto University()
2nd Author's Name Yoshihiro ICHINOMIYA
2nd Author's Affiliation Graduate School of Science and Technology, Kumamoto University:the Japan Society for the Promotion of Science
3rd Author's Name Sadaki USAGAWA
3rd Author's Affiliation Graduate School of Science and Technology, Kumamoto University
4th Author's Name Motoki AMAGASAKI
4th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
5th Author's Name Masahiro IIDA
5th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
6th Author's Name Morihiro KUGA
6th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
7th Author's Name Toshinori SUEYOSHI
7th Author's Affiliation Graduate School of Science and Technology, Kumamoto University
Date 2012-05-29
Paper # RECONF2012-11
Volume (vol) vol.112
Number (no) 70
Page pp.pp.-
#Pages 6
Date of Issue