Presentation | 2012-05-30 How to Mitigate Reliability-related Issues on Nano-scaled LSIs Kazutoshi KOBAYASHI, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | According to aggressive process scaling, reliability issues on semiconductor devices are becoming dominant such as variability, temporal failure and aging degradation. Variability is related to the device fabrication process. Timing margins at design time should be enlarged as the fluctuation of transistor performance. It may diminish the performance enhancement from process scaling. Temporal failures are mainly caused by alpha particles from packages or neutrons from outer space. These particles generate electron-hole pairs to flip memory or flip-flops, which is so-called soft errors. Redundant circuits are commonly utilized to mitigate soft errors. Aging degradation is mainly caused by BTI (Bias Temperature Instability). In BTI, transistors are degraded or recovered according to the stress history on the gate bias. We introduce several mitigation techniques based on the measurement results. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Reliability / Variation / Aging Degradation / Temporal Failure |
Paper # | VLD2012-5 |
Date of Issue |
Conference Information | |
Committee | VLD |
---|---|
Conference Date | 2012/5/23(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | VLSI Design Technologies (VLD) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | How to Mitigate Reliability-related Issues on Nano-scaled LSIs |
Sub Title (in English) | |
Keyword(1) | Reliability |
Keyword(2) | Variation |
Keyword(3) | Aging Degradation |
Keyword(4) | Temporal Failure |
1st Author's Name | Kazutoshi KOBAYASHI |
1st Author's Affiliation | Department of Electronics, Graduate School of Science & Technology, Kyoto Institute of Technology() |
Date | 2012-05-30 |
Paper # | VLD2012-5 |
Volume (vol) | vol.112 |
Number (no) | 71 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |