Presentation | 2012/2/24 An NoC Virtual Platform Based on QEMU and SystemC KEITA NAKAJIMA, TAKUJI HIEDA, ITTETSU TANIGUCHI, HIROYUKI TOMIYAMA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Network-on-Chip (NoC) is considered as a promising architecture for future many-core System-on-a-Chip (SoC) because it has better scalability for the number of cores than usual bus architecture. In this work. We have developed a fast virtual platform for NoC using QEMU and SystemC. The virtual platform enables software development for the NoC without hardware prototype board, thus the hardware/software design time can be shortened. Experiments demonstrate that our NoC virtual prototype is easy to use, very fast, and highly retargetable. |
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Paper # | Vol.2012-SLDM-155 No.1,Vol.2012-EMB-24 No.1 |
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Committee | DC |
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Conference Date | 2012/2/24(1days) |
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Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | An NoC Virtual Platform Based on QEMU and SystemC |
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1st Author's Name | KEITA NAKAJIMA |
1st Author's Affiliation | College of Science and Engineering, Ritsumeikan University() |
2nd Author's Name | TAKUJI HIEDA |
2nd Author's Affiliation | College of Science and Engineering, Ritsumeikan University |
3rd Author's Name | ITTETSU TANIGUCHI |
3rd Author's Affiliation | College of Science and Engineering, Ritsumeikan University |
4th Author's Name | HIROYUKI TOMIYAMA |
4th Author's Affiliation | College of Science and Engineering, Ritsumeikan University |
Date | 2012/2/24 |
Paper # | Vol.2012-SLDM-155 No.1,Vol.2012-EMB-24 No.1 |
Volume (vol) | vol.111 |
Number (no) | 462 |
Page | pp.pp.- |
#Pages | 6 |
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