Presentation | 2012-01-26 0.18μm process Optically Reconfigurable Gate Array VLSI Takahiro WATANABE, Minoru WATANABE, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We have been developing a type of fast reconfigurable devices, Optically Reconfigurable Gate Arrays (ORGAs) that can be reconfigured with optical components in a perfectly parallel. The ORGA can be optically reconfigured in a very short time along with a lot of reconfiguration contexts. Therefore, this device can virtually implement large gates onto a programmable gate array with a dynamic reconfiguration. This paper presents a new 0.18 μm process ORGA-VLSI and comparison results of the new 0.18 μm process ORGA-VLSI with a conventional 0.35 process ORGA-VLSI. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Optically Reconfigurable Gate Arrays(ORGAs) / FPGAs / Holographic memories |
Paper # | VLD2011-117,CPSY2011-80,RECONF2011-76 |
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Conference Information | |
Committee | RECONF |
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Conference Date | 2012/1/18(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Reconfigurable Systems (RECONF) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | 0.18μm process Optically Reconfigurable Gate Array VLSI |
Sub Title (in English) | |
Keyword(1) | Optically Reconfigurable Gate Arrays(ORGAs) |
Keyword(2) | FPGAs |
Keyword(3) | Holographic memories |
1st Author's Name | Takahiro WATANABE |
1st Author's Affiliation | Graduate School of Engineering, Shizuoka University() |
2nd Author's Name | Minoru WATANABE |
2nd Author's Affiliation | Graduate School of Engineering, Shizuoka University |
Date | 2012-01-26 |
Paper # | VLD2011-117,CPSY2011-80,RECONF2011-76 |
Volume (vol) | vol.111 |
Number (no) | 399 |
Page | pp.pp.- |
#Pages | 4 |
Date of Issue |