| Presentation | 2012-01-26 High-Level Synthesis of Hardware Relinkable to Software Makoto ORINO, Nagisa ISHIURA, Hiroyuki TOMIYAMA, Fumiaki TAKASHIMA, Hiroyuki KANBARA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This article presents a method of synthesizing relinkable hardware for hardware/software codesign utilizing high-level synthesis. Recent development of high-level synthesis through binary codes or assembly codes has enabled synthesis of functions in software programs into hardware modules callable from the software. In this scheme, however, hardware description is susceptible to the changes on the software, especially the changes on the addresses of the variables shared by software and hardware, so that the small changes on the software will lead to resynthesis of hardware or the hardware can not be linked with the other software programs. To solve this problem, we propose a method of synthesizing hardware which is less sensitive to the software changes and thus linkable to modified or different software programs without resynthesis. This is realized by synthesizing hardware from unlinked codes instead of linked codes, and a table of the addresses of the shared variables is passed from the software to the hardware. Since the task of creating and passing the address table is added by source code modification, little modification is needed on the synthesis system. We synthesized hardware modules according to the proposed method to confirm they are immune to the changes on the software part, and the hardware modules are linkable to different main programs, though extra cycles to pass the address tables are needed during initialization of the hardware modules. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | High-Level Synthesis / hardware/software codesign / relinkable hardware / ACAP |
| Paper # | VLD2011-107,CPSY2011-70,RECONF2011-66 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2012/1/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High-Level Synthesis of Hardware Relinkable to Software |
| Sub Title (in English) | |
| Keyword(1) | High-Level Synthesis |
| Keyword(2) | hardware/software codesign |
| Keyword(3) | relinkable hardware |
| Keyword(4) | ACAP |
| 1st Author's Name | Makoto ORINO |
| 1st Author's Affiliation | Kwansei Gakuin University() |
| 2nd Author's Name | Nagisa ISHIURA |
| 2nd Author's Affiliation | Kwansei Gakuin University |
| 3rd Author's Name | Hiroyuki TOMIYAMA |
| 3rd Author's Affiliation | Ritsumeikan University |
| 4th Author's Name | Fumiaki TAKASHIMA |
| 4th Author's Affiliation | Kwansei Gakuin University |
| 5th Author's Name | Hiroyuki KANBARA |
| 5th Author's Affiliation | ASTEM RI/KYOTO |
| Date | 2012-01-26 |
| Paper # | VLD2011-107,CPSY2011-70,RECONF2011-66 |
| Volume (vol) | vol.111 |
| Number (no) | 399 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |