Presentation 2012-01-25
Extension of ITRON Specification OS for Multithreaded Processors
Rikuhei UEDA, Kei FUJII, Hiroyuki CHISHIRO, Hiroki MATSUTANI, Nobuyuki YAMASAKI,
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Abstract(in English) Recent advances in embedded systems have demanded high-performance under real-time constraints. Responsive Multithreaded Processor (RMT Processor) employs prioritized Simultaneous Multithreading (SMT) architecture with hardware-assisted context switch for such high-end embedded systems. In this paper, Hyper Operating System, which is a real-time OS based on ITRON specification, is extended to support multithread processing on RMT Processor. RMT Processor specific instructions are used for task creation and dispatch, and three types of locks (task, object, and queue) are used to implement synchronization between threads. A dedicated thread is assigned for interrupt processing in order to maintain the worst-case interrupt response time when the number of threads executed simultaneously increases. Execution times of the extended service calls for the multithread processing are evaluated and compared with those of the original service calls. We also show that the dedicated thread for interrupts can maintain the interrupt response time.
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Keyword(in English) Embedded Systems / Real-Time OS / ITRON / RMT Processor / SMT
Paper # VLD2011-98,CPSY2011-61,RECONF2011-57
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Committee RECONF
Conference Date 2012/1/18(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Extension of ITRON Specification OS for Multithreaded Processors
Sub Title (in English)
Keyword(1) Embedded Systems
Keyword(2) Real-Time OS
Keyword(3) ITRON
Keyword(4) RMT Processor
Keyword(5) SMT
1st Author's Name Rikuhei UEDA
1st Author's Affiliation Department of Information and Computer Science, Faculty of Science and Technology, Keio University()
2nd Author's Name Kei FUJII
2nd Author's Affiliation Department of Computer Science, Graduate School of Science and Technology, Keio University
3rd Author's Name Hiroyuki CHISHIRO
3rd Author's Affiliation Department of Computer Science, Graduate School of Science and Technology, Keio University
4th Author's Name Hiroki MATSUTANI
4th Author's Affiliation Department of Computer Science, Graduate School of Science and Technology, Keio University
5th Author's Name Nobuyuki YAMASAKI
5th Author's Affiliation Department of Computer Science, Graduate School of Science and Technology, Keio University
Date 2012-01-25
Paper # VLD2011-98,CPSY2011-61,RECONF2011-57
Volume (vol) vol.111
Number (no) 399
Page pp.pp.-
#Pages 6
Date of Issue