| Presentation | 2012-02-13 A Test Generation Method for Synchronously Designed QDI Circuits Koki UCHIDA, Eri MURATA, Satoshi OHTAKE, Yasuhiko NAKASHIMA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Quasi-Delay-Insensitive(QDI) design has been attracting attention as one of the practical techniques for implementation of asynchronous circuits. This paper deals with QDI circuits converted from synchronous circuits. A converted circuit has latches, combinational logic blocks, and completion detectors. Since these components include C-elements which have bi-stability and the circuit has feedback loops for handshaking between latches, test generation of the circuits is difficult. In this study, we categorize the causes of difficulty and propose a solution for each problem, for improving fault coverage and reducing test generation time using commercial test generation tools. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Asynchronous circuits / Quasi-Delay-Insensitive / test generation / design-for-testability / synchronous-asynchronous conversion |
| Paper # | DC2011-83 |
| Date of Issue |
| Conference Information | |
| Committee | DC |
|---|---|
| Conference Date | 2012/2/6(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Dependable Computing (DC) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Test Generation Method for Synchronously Designed QDI Circuits |
| Sub Title (in English) | |
| Keyword(1) | Asynchronous circuits |
| Keyword(2) | Quasi-Delay-Insensitive |
| Keyword(3) | test generation |
| Keyword(4) | design-for-testability |
| Keyword(5) | synchronous-asynchronous conversion |
| 1st Author's Name | Koki UCHIDA |
| 1st Author's Affiliation | Nara Institute of Science and Technology() |
| 2nd Author's Name | Eri MURATA |
| 2nd Author's Affiliation | Nara Institute of Science and Technology |
| 3rd Author's Name | Satoshi OHTAKE |
| 3rd Author's Affiliation | Oita University:Japan Science and Technology Agency CREST |
| 4th Author's Name | Yasuhiko NAKASHIMA |
| 4th Author's Affiliation | Nara Institute of Science and Technology |
| Date | 2012-02-13 |
| Paper # | DC2011-83 |
| Volume (vol) | vol.111 |
| Number (no) | 435 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |