Presentation 2012-02-13
A method to reduce the number of testpatterns for transition faults using control point insertions
Akihiko TAKAHASHI, Toshinori HOSOKAWA, Masayoshi YOSHIMURA,
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Abstract(in English) In recent year, the growing density and complexity for VLSIs cause an increase in the number of test patterns. Moreover, defects with timing delay which cannot be detected by test patterns for stuck-at fault increase. Therefore, it is important to detect not only stuck-at faults but also transition faults. In this paper, we propose a control point insertion method to reduce the number of test patterns for transition faults in broad-side testing. Control points are inserted into D-input signal lines of scan flip-flops and the values of signal lines in both time frame 1 and time frame 2 are identified as don't care bits. As the result of control point insertion, the number of don't care bits increases and test compaction efficiency becomes high. Experimental results for ISCAS'89 benchmark circuits show that our proposed control point insertion method reduced the number of test patterns for transition faults by 0~38.0% compared with the conventional test compaction oriented control point insertion method.
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Keyword(in English) transition faults / broadside / testing control point insertions / don't care identification / test compaction
Paper # DC2011-82
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Committee DC
Conference Date 2012/2/6(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A method to reduce the number of testpatterns for transition faults using control point insertions
Sub Title (in English)
Keyword(1) transition faults
Keyword(2) broadside
Keyword(3) testing control point insertions
Keyword(4) don't care identification
Keyword(5) test compaction
1st Author's Name Akihiko TAKAHASHI
1st Author's Affiliation Graduate School of Industrial Technology, Nihon University()
2nd Author's Name Toshinori HOSOKAWA
2nd Author's Affiliation College of Industrial Technology, Nihon University
3rd Author's Name Masayoshi YOSHIMURA
3rd Author's Affiliation Graduate School of Infomation Science and Electrical Engineering, Kyushu University
Date 2012-02-13
Paper # DC2011-82
Volume (vol) vol.111
Number (no) 435
Page pp.pp.-
#Pages 6
Date of Issue