Presentation 2012-02-13
A new problem at Boundary-Scan testing : an internal disruption within IC during interconnect testing
Shuichi KAMEYAMA, Masayuki Baba, Yoshinobu HIGAMI, Hiroshi TAKAHASHI,
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Abstract(in English) The miniaturization of electronic products is causing printed circuit boards to progress in the direction of higher density, using, for example, BGA (Ball Grid Array) devices. In this situation, Boundary-scan Test technology is increasingly more important, since it is the best way to detect manufacturing defects easily on the dense boards. This paper describes a side-effect caused by an internal disruption within an IC during the Boundary-Scan test, and also describes the root-cause and the measures for it on the basis of our experience.
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Keyword(in English) Boundary-scan / test / internal circuit / interconnect testing / Lobotomy problem
Paper # DC2011-81
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Committee DC
Conference Date 2012/2/6(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A new problem at Boundary-Scan testing : an internal disruption within IC during interconnect testing
Sub Title (in English)
Keyword(1) Boundary-scan
Keyword(2) test
Keyword(3) internal circuit
Keyword(4) interconnect testing
Keyword(5) Lobotomy problem
1st Author's Name Shuichi KAMEYAMA
1st Author's Affiliation Fujitsu Limited:Ehime University()
2nd Author's Name Masayuki Baba
2nd Author's Affiliation Fujitsu Limited
3rd Author's Name Yoshinobu HIGAMI
3rd Author's Affiliation Ehime University
4th Author's Name Hiroshi TAKAHASHI
4th Author's Affiliation Ehime University
Date 2012-02-13
Paper # DC2011-81
Volume (vol) vol.111
Number (no) 435
Page pp.pp.-
#Pages 5
Date of Issue