| Presentation | 2012-01-20 A 115mW 1Gbps QC-LDPC Decoder ASIC for WiMAX in 65nm CMOS Xiao PENG, Zhixiang CHEN, Xiongxin ZHAO, Dajiang ZHOU, Satoshi GOTO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Structured quasi-cyclic low-density parity-check (QC-LDPC) code is a part of many emerging wireless communication standards, such as WiMAX, WiFi and WPAN. This paper presents a high parallel decoder architecture for the QC-LDPC codes and the corresponding decoder ASIC for WiMAX system. Through utilizing the proposed fully parallel layered scheduling architecture, the decoder chip saves 22.2% memory bits and takes 24～48 clock cycles per iteration for different code rates. It occupies 3.36 mm^2 in SMIC 65nm CMOS, and realizes 1Gbps (1056Mbps) throughput at 1.2V, 110MHz and 10 iterations with the power 115mW and power efficiency 10.9pJ/bit/iteration. The energy/bit/iteration reduces 63.6% in normalized comparison with the state-of-art publication. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | LDPC / Decoder / High-parallel / Low-power |
| Paper # | ICD2011-143 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2012/1/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 115mW 1Gbps QC-LDPC Decoder ASIC for WiMAX in 65nm CMOS |
| Sub Title (in English) | |
| Keyword(1) | LDPC |
| Keyword(2) | Decoder |
| Keyword(3) | High-parallel |
| Keyword(4) | Low-power |
| 1st Author's Name | Xiao PENG |
| 1st Author's Affiliation | Graduate School of Information, Production and Systems, Waseda University() |
| 2nd Author's Name | Zhixiang CHEN |
| 2nd Author's Affiliation | Graduate School of Information, Production and Systems, Waseda University |
| 3rd Author's Name | Xiongxin ZHAO |
| 3rd Author's Affiliation | Graduate School of Information, Production and Systems, Waseda University |
| 4th Author's Name | Dajiang ZHOU |
| 4th Author's Affiliation | Graduate School of Information, Production and Systems, Waseda University |
| 5th Author's Name | Satoshi GOTO |
| 5th Author's Affiliation | Graduate School of Information, Production and Systems, Waseda University |
| Date | 2012-01-20 |
| Paper # | ICD2011-143 |
| Volume (vol) | vol.111 |
| Number (no) | 388 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |