| Presentation | 2012-01-20 An Evaluation of An FPGA Based on Synchronous/Asynchronous Hybrid Architecture Yoshiya KOMATSU, Masanori HARIYAMA, Shota ISHIHARA, Ryoto TSUCHIYA, Michitaka KAMEYAMA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents an FPGA architecture that combines synchronous and asynchronous architectures. Datapath components such as logic blocks and switch blocks are designed so as to run in asynchronous and synchronous modes. Moreover, a logic block is presented that implements area-efficient First-in-first-out(FIFO) interfaces, which are usually used for communication between synchronous and asynchronous logic cores. The FPGA based on the hybrid architecture is fabricated in a 65nm process. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Reconfigurable VLSI / Self-timed architecture / Delay-insensitive architecture |
| Paper # | ICD2011-142 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 2012/1/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Evaluation of An FPGA Based on Synchronous/Asynchronous Hybrid Architecture |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Reconfigurable VLSI |
| Keyword(3) | Self-timed architecture |
| Keyword(4) | Delay-insensitive architecture |
| 1st Author's Name | Yoshiya KOMATSU |
| 1st Author's Affiliation | Graduate School of Information Sciences, Tohoku University() |
| 2nd Author's Name | Masanori HARIYAMA |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| 3rd Author's Name | Shota ISHIHARA |
| 3rd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| 4th Author's Name | Ryoto TSUCHIYA |
| 4th Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| 5th Author's Name | Michitaka KAMEYAMA |
| 5th Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| Date | 2012-01-20 |
| Paper # | ICD2011-142 |
| Volume (vol) | vol.111 |
| Number (no) | 388 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |