Presentation | 2012-01-19 Challenges and Opportunities for Normally-Off Computing Hiroshi NAKAMURA, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Low Power Consumption / Non-Volatile Memory / Power Gating / Co-Design / Memory Hierarchy |
Paper # | ICD2011-138 |
Date of Issue |
Conference Information | |
Committee | ICD |
---|---|
Conference Date | 2012/1/12(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Challenges and Opportunities for Normally-Off Computing |
Sub Title (in English) | |
Keyword(1) | Low Power Consumption |
Keyword(2) | Non-Volatile Memory |
Keyword(3) | Power Gating |
Keyword(4) | Co-Design |
Keyword(5) | Memory Hierarchy |
1st Author's Name | Hiroshi NAKAMURA |
1st Author's Affiliation | Graduate School of Information Science and Technology, The University of Tokyo() |
Date | 2012-01-19 |
Paper # | ICD2011-138 |
Volume (vol) | vol.111 |
Number (no) | 388 |
Page | pp.pp.- |
#Pages | 33 |
Date of Issue |