Presentation	2012-01-19 Low Power Technologies and Scaling Law Toward Future Koichiro ISHIBASHI,
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Abstract(in English)	LSI density has been increasing by Moore's law, and performance of LSI has also been increasing with decreasing power dissipation. Many low power techniques have been developed, and LSI power has been drastically decreased by scaling law. The low power nature of LSI has exploited many applications and has created ITC society. However, recent trend of saturated power supply voltage reduction rate due to variability and leakage of advanced MOS transistors will make issues of power consumption again. Multi CPU core architecture is the one of solution for the issue, but there will be a limitation of the number of core operating at the same time in the future. We need further to reduce the power supply voltage again to around 0.4V with new device structure such as FINFET or SOTB.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	Low Power / Scaling Law
Paper #	ICD2011-136
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Conference Information
Committee	ICD
Conference Date	2012/1/12(1days)
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Paper Information
Registration To	Integrated Circuits and Devices (ICD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Low Power Technologies and Scaling Law Toward Future
Sub Title (in English)
Keyword(1)	Low Power
Keyword(2)	Scaling Law
1st Author's Name	Koichiro ISHIBASHI
1st Author's Affiliation	Graduate School of Informatics and Engineering, The University of Electro-Communications()
Date	2012-01-19
Paper #	ICD2011-136
Volume (vol)	vol.111
Number (no)	388
Page	pp.pp.-
#Pages	2
Date of Issue