| Presentation | 2012/1/12 アイドル時のキャッシュ電源遮断による性能ペナルティとその削減手法(低消費電力技術,集積回路とアーキテクチャの協創～ノーマリオフコンピューティングによる低消費電力化への挑戦～) , |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
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| Keyword(in Japanese) | (See Japanese page) |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2012/1/12(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
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| 1st Author's Name | |
| 1st Author's Affiliation | The University of Tokyo() |
| Date | 2012/1/12 |
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| Volume (vol) | vol.111 |
| Number (no) | 388 |
| Page | pp.pp.- |
| #Pages | 6 |
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