| Presentation | 2011/12/8 Memory Size Reduction Technique for Residual Error Correction of a Direct Digital Synthesizer Using Piecewise-Linear Approximation Kenichi TAJIMA, Kenji KAWAKAMI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a novel memory size reduction technique for residual error-correction of a direct digital synthesizer (DOS) using piecewise-linear approximation. In the phase-to-amplitude conversion circuit of the DOS, the phase data between 0 and 90 degrees is divided into two or more segments; and piecewise-linear approximation of a sine wave is performed. A residual error correction memory is used to reduce the residue error after piecewise-linear approximation. In order to reduce the size of this memory, we propose the standardized memory technique between segments. In this proposed technique, phase data which is equivalent to memory address is changed to optimum value according to each segment. Principle explanation and circuit configuration of the proposed technique are described. To verify the proposed method, we examine internal parameters and calculate the maximum spurious level at output of the phase-to-amplitude conversion circuit in the case of 8 segments. Comparison with the conventional technique which does not perform memory reduction shows the validity of a proposed technique. The proposed technique reduces the total size of memories to approximately 1/2^s. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Direct digital synthesizer / Phase to amplitude conversion / Residue error / Spurious / Memory compression |
| Paper # | MW2001-130 |
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| Committee | MW |
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| Conference Date | 2011/12/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Microwaves (MW) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Memory Size Reduction Technique for Residual Error Correction of a Direct Digital Synthesizer Using Piecewise-Linear Approximation |
| Sub Title (in English) | |
| Keyword(1) | Direct digital synthesizer |
| Keyword(2) | Phase to amplitude conversion |
| Keyword(3) | Residue error |
| Keyword(4) | Spurious |
| Keyword(5) | Memory compression |
| 1st Author's Name | Kenichi TAJIMA |
| 1st Author's Affiliation | Mitsubishi Electric corporation() |
| 2nd Author's Name | Kenji KAWAKAMI |
| 2nd Author's Affiliation | Mitsubishi Electric corporation |
| Date | 2011/12/8 |
| Paper # | MW2001-130 |
| Volume (vol) | vol.111 |
| Number (no) | 351 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |