| Presentation | 2011-12-16 Fault-tolerant Wormhole Switching with Partial Backtrack Capability Hiroki KANAI, Masato KITAKAMI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Since a parallel computer and Network-on-Chip (NoC) have many elements, their failure rate is high. Fault-tolerance is important for such systems, which sometimes have partial failure, to avoid system-down. Wormhole Switching is widely used switching and is weak to failure; and therefore, many fault-tolerant routing algorithm for Wormhole Switching have been proposed. Some conventional routing algorithm achieve low throughput because they have severe restriction to determine available nodes. This paper proposed fault-tolerant Wormhole Switching which has back-tracking capability and is suitable for flexible routing algorithm. Back-tracking is enabled by a copy of header flit, which investigates the network in advance. That is, back-tracking to the node where the copy header flit was generated is possible. Computer simulation says that for the network with 30 to 40% failure links, the throughput of the proposed method is higher than that of the conventional method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | parallel computer / Network-on-Chip / switching / Wormhole / fault-tolerance |
| Paper # | DC2011-75 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2011/12/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fault-tolerant Wormhole Switching with Partial Backtrack Capability |
| Sub Title (in English) | |
| Keyword(1) | parallel computer |
| Keyword(2) | Network-on-Chip |
| Keyword(3) | switching |
| Keyword(4) | Wormhole |
| Keyword(5) | fault-tolerance |
| 1st Author's Name | Hiroki KANAI |
| 1st Author's Affiliation | Graduate School of Advanced Integration Science, Chiba University() |
| 2nd Author's Name | Masato KITAKAMI |
| 2nd Author's Affiliation | Graduate School of Advanced Integration Science, Chiba University |
| Date | 2011-12-16 |
| Paper # | DC2011-75 |
| Volume (vol) | vol.111 |
| Number (no) | 362 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |