Presentation 2011-11-29
Synthesis of efficient data fetch mechanism from the high level communication description
Masato MINATO, Yuki ANDO, Seiya SHIBATA, Tomoo KINOSHITA, Shinya HONDA, Hiroaki TAKADA,
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Abstract(in English) This paper presents efficient data fetch mechanism for the FIFO-based implementation generated by System-Builder, a system level design environment. This mechanism achieves speeding up the communication and saving memory cost, and automatically synthesized from the high level communication description with an option. The case study which the data writer and data reader have different active interval shows the efficiency of our method.
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Keyword(in English) system-level design / DMA / data prefetch
Paper # VLD2011-67,DC2011-43
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Committee DC
Conference Date 2011/11/21(1days)
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Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Synthesis of efficient data fetch mechanism from the high level communication description
Sub Title (in English)
Keyword(1) system-level design
Keyword(2) DMA
Keyword(3) data prefetch
1st Author's Name Masato MINATO
1st Author's Affiliation Graduate School of Information Science, Nagoya University()
2nd Author's Name Yuki ANDO
2nd Author's Affiliation Graduate School of Information Science, Nagoya University
3rd Author's Name Seiya SHIBATA
3rd Author's Affiliation Graduate School of Information Science, Nagoya University
4th Author's Name Tomoo KINOSHITA
4th Author's Affiliation Embedded System Group, Soliton Systems K.K.
5th Author's Name Shinya HONDA
5th Author's Affiliation Graduate School of Information Science, Nagoya University
6th Author's Name Hiroaki TAKADA
6th Author's Affiliation Graduate School of Information Science, Nagoya University
Date 2011-11-29
Paper # VLD2011-67,DC2011-43
Volume (vol) vol.111
Number (no) 325
Page pp.pp.-
#Pages 6
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