Presentation 2011-11-28
CMOS Op-amp Offset Calibration Technique Using Closed Loop Offset Amplifier and Folded-Alternated Resistor String DAC
Hiroyuki Morimoto, Hiroaki Goto, Hajime Fujiwara, Kazuyuki Nakamura,
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Abstract(in English) This paper describes the development of a circuit system that enables the offset calibration of an op-amp circuit after production. A closed-loop feedback system was developed to realize high-speed and accurate offset calibration action. For the D/A converter which occupies most of the area for the additional calibration circuit, the Folded-Alternated Resistor String DAC was developed. This reduced the area by and realized low power consumption while maintaining the same accuracy as a conventional type of DAC. The fabrication with standard 0.35μm CMOS, followed by actual measurement, has confirmed that the offset can be confined to no more than 1.5mV using the new calibration circuit. With this technique, miniaturization of a whole op-amp system can be achieved, because the layout size of each circuit consisting of op-amps can be reduced when using this offset correction circuit.
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Keyword(in English) Op-amp / offset / calibration / D/A converter / Resistor sting
Paper # VLD2011-65,DC2011-41
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Committee DC
Conference Date 2011/11/21(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) CMOS Op-amp Offset Calibration Technique Using Closed Loop Offset Amplifier and Folded-Alternated Resistor String DAC
Sub Title (in English)
Keyword(1) Op-amp
Keyword(2) offset
Keyword(3) calibration
Keyword(4) D/A converter
Keyword(5) Resistor sting
1st Author's Name Hiroyuki Morimoto
1st Author's Affiliation Center for Microelectronic Systems, Kyushu Institute of Technology()
2nd Author's Name Hiroaki Goto
2nd Author's Affiliation Center for Microelectronic Systems, Kyushu Institute of Technology
3rd Author's Name Hajime Fujiwara
3rd Author's Affiliation New Japan Radio Co. Ltd.
4th Author's Name Kazuyuki Nakamura
4th Author's Affiliation Center for Microelectronic Systems, Kyushu Institute of Technology
Date 2011-11-28
Paper # VLD2011-65,DC2011-41
Volume (vol) vol.111
Number (no) 325
Page pp.pp.-
#Pages 6
Date of Issue