Presentation | 2011/10/17 Multiple Supply Voltages aware High-level Synthesis for HDR architecture SHIN-YA ABE, MASAO YANAGISAWA, Nozomu TOGAWA, |
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Abstract(in English) | As buttery runtime and overheating problems for portable devices become unignorable, energy-aware LSI design is strongly required. Moreover, an interconnect delay should be explicitly considered there because it exceeds a gate delay as the semiconductor devices are downsized. We must take account of energy efficiency and interconnect delay even in high-level synthesis. Recently, a huddle-based distributed-register architecture (HDR architecture), which is a kind of island-based distributed-register architecture for multi-cycle interconnect communications, and its associated synthesis algorithm have been proposed. The algorithm is composed of scheduling/FU binding, huddling, unhuddling, and floorplanning. However, the original scheduling/FU binding does not minimize energy consumption directly but minimizes execution time. In this paper we propose a new scheduling/FU binding algorithm whose purpose is the minimization of energy consumption considering multiple supply voltages for HDR architectures. Experimental results show that our algorithm achieves 45.1 % energy-saving compared with the conventional distributed-register architectures and conventional algorithms, and 15.9 % energy-saving compared with the conventional algorithm for HDR architecture. |
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Paper # | Vol.2011-SLDM-152 No.17 |
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Committee | ICD |
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Conference Date | 2011/10/17(1days) |
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Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
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Title (in English) | Multiple Supply Voltages aware High-level Synthesis for HDR architecture |
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1st Author's Name | SHIN-YA ABE |
1st Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University() |
2nd Author's Name | MASAO YANAGISAWA |
2nd Author's Affiliation | Dept. of Electronic and Photonic Systems, Waseda University |
3rd Author's Name | Nozomu TOGAWA |
3rd Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
Date | 2011/10/17 |
Paper # | Vol.2011-SLDM-152 No.17 |
Volume (vol) | vol.111 |
Number (no) | 258 |
Page | pp.pp.- |
#Pages | 6 |
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