Presentation 2011-10-25
Dynamically reconfigurable vision-chip architecture using a lens array
Yuki KAMIKUBO, Minoru WATANABE, Shoji KAWAHITO,
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Abstract(in English) In recent years, development of a high-speed image processing system is required for autonomous robots, cars, and so on. Since such embedded system must execute image processing operations at 1000 frames/s, there are issues in transferring image information between a processor chip and a memory chip and in processing it. Up to now, some vision chips including processing elements have been developed. However, such vision chip can execute only simple image operations and its performance is insufficient. Therefore, we have been developing a dynamically reconfigurable vision-chip architecture. This paper presents the experimental results of a dynamically reconfigurable vision-chip architecture using a lens array.
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Keyword(in English) Optically Reconfigurable Gate Arrays(ORGAs) / Lens arrays / Dynamic reconfiguration
Paper # SIP2011-75,ICD2011-78,IE2011-74
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Committee ICD
Conference Date 2011/10/17(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Dynamically reconfigurable vision-chip architecture using a lens array
Sub Title (in English)
Keyword(1) Optically Reconfigurable Gate Arrays(ORGAs)
Keyword(2) Lens arrays
Keyword(3) Dynamic reconfiguration
1st Author's Name Yuki KAMIKUBO
1st Author's Affiliation Faculty of Engineering, Shizuoka University()
2nd Author's Name Minoru WATANABE
2nd Author's Affiliation Faculty of Engineering, Shizuoka University
3rd Author's Name Shoji KAWAHITO
3rd Author's Affiliation Research Institute of Electronics, Shizuoka University
Date 2011-10-25
Paper # SIP2011-75,ICD2011-78,IE2011-74
Volume (vol) vol.111
Number (no) 258
Page pp.pp.-
#Pages 5
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