Presentation 2011-10-20
Fast Circuit Simulation Based on Improved Latency Insertion Method with Predictor-Corrector Method
Hiroki KUROBE, Tadatoshi SEKINE, Hideki ASAI,
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Abstract(in English) This report describes an improved latency insertion method (LIM) with predictor-corrector method for the fast transient simulation of large networks. The LIM analyzes a network effectively by exploiting latencies in the network. If we have to analyze an ill-constructed circuit, an extremely small value of latency is inserted into the network. However, this treatment leads an extremely small time step size and a large amount of time steps. In order to circumvent this inherent limitation, we propose the predictor-corrector LIM. Our proposed method can employ a large value of latency without incurring the inherent limitation. Thus, the proposed method can perform the fast transient simulation compared with the basic LIM. Finally, an example circuit is analyzed by the conventional methods and the proposed method, we estimate the accuracy and the CPU time of the proposed method.
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Keyword(in English) fast transient simulation / latency insertion method / predictor-corrector method / tightly coupled transmission lines
Paper # CAS2011-39,NLP2011-66
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Committee CAS
Conference Date 2011/10/13(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Fast Circuit Simulation Based on Improved Latency Insertion Method with Predictor-Corrector Method
Sub Title (in English)
Keyword(1) fast transient simulation
Keyword(2) latency insertion method
Keyword(3) predictor-corrector method
Keyword(4) tightly coupled transmission lines
1st Author's Name Hiroki KUROBE
1st Author's Affiliation Dept. of Systems Eng., Graduate School of Eng., Shizuoka University()
2nd Author's Name Tadatoshi SEKINE
2nd Author's Affiliation Dept. of Information Science and Tech., Graduate School of Science and Tech., Shizuoka University
3rd Author's Name Hideki ASAI
3rd Author's Affiliation Dept. of Systems Eng., Graduate School of Eng., Shizuoka University:Dept. of Information Science and Tech., Graduate School of Science and Tech., Shizuoka University:Dept. of Systems Eng., Shizuoka University
Date 2011-10-20
Paper # CAS2011-39,NLP2011-66
Volume (vol) vol.111
Number (no) 242
Page pp.pp.-
#Pages 6
Date of Issue