| Presentation | 2011-10-12 Examination of Cryogenic CMOS Amplifiers for Josephson-CMOS Hybrid Memories Hyunjoo Jin, Keita Kuwabara, Yuki Yamanashi, Nobuyuki Yoshikawa, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have been investigating a Josephson-CMOS hybrid memory system, which hybridize high-speed, low-power single-flux-quantum (SFQ) circuits and high-density CMOS circuits. In the hybrid system, the interface circuit is a key component, which amplifies sub-milivolts-level signals from SFQ circuits to volt-level CMOS signals at high speed. The interface circuit is composed of a Josephson latching driver (JLD) and a cryogenic CMOS amplifier. In this paper, we proposed three types of cryogenic CMOS amplifiers. One is a cascaded amplifier, and the others are a single-end source-follower amplifier and a self-biased source-follower amplifier. Proposed cryogenic CMOS amplifiers were simulated by using the low temperature CMOS device model assuming a 0.18 μrn CMOS process. We investigated the characteristics of three types of cryogenic CMOS amplifiers in terms of operation frequency, power consumption, bias margin, and delay time. They were implemented using a 0.18 μm CMOS process and their correct operations were confirmed at liquid helium temperature. From the measurement results, it was found that the best cryogenic CMOS amplifier in terms robustness, power consumption and operating speed is the self-biased source-follower amplifier. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Josephson-CMOS hybrid memory system / Interface circuits / Cryogenic CMOS amplifiers / Self-biased source-follower amplifiers |
| Paper # | SCE2011-17 |
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| Committee | SCE |
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| Conference Date | 2011/10/5(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Examination of Cryogenic CMOS Amplifiers for Josephson-CMOS Hybrid Memories |
| Sub Title (in English) | |
| Keyword(1) | Josephson-CMOS hybrid memory system |
| Keyword(2) | Interface circuits |
| Keyword(3) | Cryogenic CMOS amplifiers |
| Keyword(4) | Self-biased source-follower amplifiers |
| 1st Author's Name | Hyunjoo Jin |
| 1st Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University() |
| 2nd Author's Name | Keita Kuwabara |
| 2nd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 3rd Author's Name | Yuki Yamanashi |
| 3rd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 4th Author's Name | Nobuyuki Yoshikawa |
| 4th Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| Date | 2011-10-12 |
| Paper # | SCE2011-17 |
| Volume (vol) | vol.111 |
| Number (no) | 230 |
| Page | pp.pp.- |
| #Pages | 6 |
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