Presentation 2011-09-27
A Basic Implementation of LUT-based Dynamic and Partial Reconfiguration from Remote site
Hiroyuki KAWAI, Moritoshi YASUNAGA,
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Abstract(in English) In this study we implement a mechanism that makes it possible to execute dynamic and partial reconfiguration from remote site. For this puropose an FPGA board is connected to Ethernet using XilKernel and lwIP. They are controlled by Microblaze, a soft-core CPU provided by Xilinx. Next, a structure where only designated LUTs are dynamically reconfigured is implemented. Hence combinational circuits can be reconfigured and ED A software is not required for reconfiguration. As an experiment face image recognition using DP-DDI (Dynamic and Partial Direct Data Implementation) which we have proposed is adopted and the effectiveness of this study is shown.
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Keyword(in English) FPGA / Dynamic and Partial Reconfiguration / Remote Reconfiguration
Paper # RECONF2011-34
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Committee RECONF
Conference Date 2011/9/19(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Basic Implementation of LUT-based Dynamic and Partial Reconfiguration from Remote site
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Dynamic and Partial Reconfiguration
Keyword(3) Remote Reconfiguration
1st Author's Name Hiroyuki KAWAI
1st Author's Affiliation Hamamatsu Photonics K. K.()
2nd Author's Name Moritoshi YASUNAGA
2nd Author's Affiliation Department of Systems and Information Engineering, University of Tsukuba
Date 2011-09-27
Paper # RECONF2011-34
Volume (vol) vol.111
Number (no) 218
Page pp.pp.-
#Pages 6
Date of Issue