講演名 | 2011-09-26 Preemptive Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs : Hardware and Reconfiguration Layers , |
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抄録(英) | Preemption techniques for HW (hardware) tasks have been studied in order to improve their responsiveness and to allow implementation of a blocking call within a task. In order to support preemption of HW tasks at a level of a conventional software multitasking OS, context saving and restoring mechanisms must be implemented in hardware and appropriate software programming interface, abstracting their implementation details, provided. This paper presents a solution for efficient preemptive hardware multitasking on Xilinx Virtex FPGAs. It comprises an embedded system framework and design flow back-end tools which automate generation of preemptable HW tasks and configuration files used by the framework. The framework features in a high-speed reconfiguration/readback controller and a low-footprint configuration layer. The layer provides an easy-to-use API (Application Programming Interface) facilitating management of the preemption process, which could be used as a base of a fully fledged preemptive SW/HW multitasking OS. The framework has been implemented on top of the Virtex-4 FPGAs and showed promising results. |
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キーワード(英) | Run-time Reconfiguration / Dynamic Reconfiguration / FPGA |
資料番号 | RECONF2011-29 |
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研究会情報 | |
研究会 | RECONF |
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開催期間 | 2011/9/19(から1日開催) |
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講演論文情報詳細 | |
申込み研究会 | Reconfigurable Systems (RECONF) |
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本文の言語 | ENG |
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タイトル(英) | Preemptive Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs : Hardware and Reconfiguration Layers |
サブタイトル(和) | |
キーワード(1)(和/英) | / Run-time Reconfiguration |
第 1 著者 氏名(和/英) | / Krzysztof Jozwik |
第 1 著者 所属(和/英) | Graduate School of Information Science, Nagoya University |
発表年月日 | 2011-09-26 |
資料番号 | RECONF2011-29 |
巻番号(vol) | vol.111 |
号番号(no) | 218 |
ページ範囲 | pp.- |
ページ数 | 6 |
発行日 |