| Presentation | 2011-08-25 Plasma Doping and Laser Spike Annealing Technique for Steep SDE Formation in nano-scale MOSFET Emiko SUGIZAKI, Toshitaka MIYATA, Yasunori OSHIMA, Akira HOKAZONO, Kanna ADACHI, Kiyotaka MIYANO, Hideji TSUJII, Shigeru KAWANAKA, Satoshi INABA, Takaharu ITANI, Toshihiko IINUMA, Yoshiaki TOYOSHIMA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The importance of impurity profile design for Source/Drain Extension (SDE) is widely recognized for deeply scaled MOSFET. In this paper, novel SDE formation scheme in planar pMOSFET is discussed using Plasma Doping (PD) and Laser Spike Annealing (LSA), comparing with conventional Ion Implantation (I/I) technique. It is found that the combination of PD and high-temperature LSA can realize the abrupt boron profile and an additive efficiency of halo doping in channel region. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MOSFET / Plasma Doping / Laser Spike Annealing / Halo doping |
| Paper # | SDM2011-75,ICD2011-43 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2011/8/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Plasma Doping and Laser Spike Annealing Technique for Steep SDE Formation in nano-scale MOSFET |
| Sub Title (in English) | |
| Keyword(1) | MOSFET |
| Keyword(2) | Plasma Doping |
| Keyword(3) | Laser Spike Annealing |
| Keyword(4) | Halo doping |
| 1st Author's Name | Emiko SUGIZAKI |
| 1st Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation() |
| 2nd Author's Name | Toshitaka MIYATA |
| 2nd Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| 3rd Author's Name | Yasunori OSHIMA |
| 3rd Author's Affiliation | Semiconductor & Storage Products Company, Toshiba Corporation |
| 4th Author's Name | Akira HOKAZONO |
| 4th Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| 5th Author's Name | Kanna ADACHI |
| 5th Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| 6th Author's Name | Kiyotaka MIYANO |
| 6th Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| 7th Author's Name | Hideji TSUJII |
| 7th Author's Affiliation | Semiconductor & Storage Products Company, Toshiba Corporation |
| 8th Author's Name | Shigeru KAWANAKA |
| 8th Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| 9th Author's Name | Satoshi INABA |
| 9th Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| 10th Author's Name | Takaharu ITANI |
| 10th Author's Affiliation | Semiconductor & Storage Products Company, Toshiba Corporation |
| 11th Author's Name | Toshihiko IINUMA |
| 11th Author's Affiliation | Semiconductor & Storage Products Company, Toshiba Corporation |
| 12th Author's Name | Yoshiaki TOYOSHIMA |
| 12th Author's Affiliation | Corporate Research and Development Center, Toshiba Corporation |
| Date | 2011-08-25 |
| Paper # | SDM2011-75,ICD2011-43 |
| Volume (vol) | vol.111 |
| Number (no) | 187 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |