Presentation | 2011-07-22 On-Chip Resonant Supply Noise Reduction Using Active Decoupling Capacitors Jinmyoung KIM, Toru NAKURA, Hidehiro TAKATA, Koichiro ISHIBASHI, Makoto IKEDA, Kunihiro ASADA, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper presents a decoupling capacitance boosting method for on-chip resonant supply noise reduction for DVS systems. The switching controls of decoupling capacitors depending on the supply noise states achieve an effective noise reduction and fast settling time simultaneously compared with the conventional passive decoupling capacitors. The measurement results of a test chip fabricated in a 0.18μm CMOS technology show 12X boost of effective decap value, and 65.8% supply noise reduction with 96% settling time improvement. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Resonant supply noise / Rush Current / DVS / Active Decoupling Capacitors |
Paper # | ICD2011-27 |
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Committee | ICD |
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Conference Date | 2011/7/14(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | On-Chip Resonant Supply Noise Reduction Using Active Decoupling Capacitors |
Sub Title (in English) | |
Keyword(1) | Resonant supply noise |
Keyword(2) | Rush Current |
Keyword(3) | DVS |
Keyword(4) | Active Decoupling Capacitors |
1st Author's Name | Jinmyoung KIM |
1st Author's Affiliation | Dept. of Electrical Engineering, the University of Tokyo() |
2nd Author's Name | Toru NAKURA |
2nd Author's Affiliation | VLSI Design and Education Center, the University of Tokyo |
3rd Author's Name | Hidehiro TAKATA |
3rd Author's Affiliation | Design Platform Development Division, Renesas Electronics Corporation |
4th Author's Name | Koichiro ISHIBASHI |
4th Author's Affiliation | Design Platform Development Division, Renesas Electronics Corporation |
5th Author's Name | Makoto IKEDA |
5th Author's Affiliation | Dept. of Electrical Engineering, the University of Tokyo:VLSI Design and Education Center, the University of Tokyo |
6th Author's Name | Kunihiro ASADA |
6th Author's Affiliation | Dept. of Electrical Engineering, the University of Tokyo:VLSI Design and Education Center, the University of Tokyo |
Date | 2011-07-22 |
Paper # | ICD2011-27 |
Volume (vol) | vol.111 |
Number (no) | 151 |
Page | pp.pp.- |
#Pages | 4 |
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