| Presentation | 2011-07-21 A Level Shifter with Logic Error Correction Circuit for Low-Voltage Digital LSIs Yuji OSAKI, Tetsuya HIROSE, Nobutaka KUROKI, Masahiro NUMA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit consists of a level conversion circuit and a logic error correction circuit. The level conversion circuit generates output voltage signal according to the voltage difference between complementary input signals. The logic error correction circuit has a distinctive feature in current generation scheme by detecting input and output logic levels. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achieves low-power operation because it dissipates operating current only when the input signals change. Measurement results demonstrated that the circuit can convert low-oltage input signals of 0.4V into 3V output signals. The power dissipation was 58 nW at 0.4-V and 10-kHz input pulse. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Level shifter / Low voltage operation / Low power dissipation |
| Paper # | ICD2011-21 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 2011/7/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Level Shifter with Logic Error Correction Circuit for Low-Voltage Digital LSIs |
| Sub Title (in English) | |
| Keyword(1) | Level shifter |
| Keyword(2) | Low voltage operation |
| Keyword(3) | Low power dissipation |
| 1st Author's Name | Yuji OSAKI |
| 1st Author's Affiliation | Graduate School of Engineering, Kobe University() |
| 2nd Author's Name | Tetsuya HIROSE |
| 2nd Author's Affiliation | Graduate School of Engineering, Kobe University |
| 3rd Author's Name | Nobutaka KUROKI |
| 3rd Author's Affiliation | Graduate School of Engineering, Kobe University |
| 4th Author's Name | Masahiro NUMA |
| 4th Author's Affiliation | Graduate School of Engineering, Kobe University |
| Date | 2011-07-21 |
| Paper # | ICD2011-21 |
| Volume (vol) | vol.111 |
| Number (no) | 151 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |