Presentation 2011-06-24
International Conference Report : VTS2011(29th IEEE VLSI Test Symposium)
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This talk provide a report of VTS2011 (29th IEEE VLSI Test Symposium), which was held in Dana Point, California, USA, in May, 2011. After showing the outline of VTS and VTS2011, the trend of paper topic area is given. Then the summaries of keynote speech and invited talks are followed by detailed reports on noticeable papers in the areas of silicon debug, utilization of on-chip sensors, low power test and design for testability.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) silicon debug / on-chip sensor / low power test / design for testability
Paper # DC2011-11
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Conference Information
Committee DC
Conference Date 2011/6/17(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
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Topics (in English)
Vice Chair

Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) International Conference Report : VTS2011(29th IEEE VLSI Test Symposium)
Sub Title (in English)
Keyword(1) silicon debug
Keyword(2) on-chip sensor
Keyword(3) low power test
Keyword(4) design for testability
1st Author's Name Kazumi HATAYAMA
1st Author's Affiliation Graduate School of Information Science, Nara Institute of Science and Technology()
Date 2011-06-24
Paper # DC2011-11
Volume (vol) vol.111
Number (no) 100
Page pp.pp.-
#Pages 6
Date of Issue