| Presentation | 2011-06-24 A study on path selection results of an adaptive field test with process variation and aging degradation for VLSI Satoshi KASHIWAZAKI, Toshinori HOSOKAWA, Masayoshi YOSHIMURA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | It has the problem that good VLSIs in production testing become defective VLSIs in the fields because small delays on signal lines are caused by aged deterioration. Some field test methods have been proposed to detect defects caused by aged deterioration. However, it is difficult to detect small delay faults comprehensively in field testing from the view point of test application time. Therefore, it is important to select target paths to detect small delay faults effectively in field testing. On field testing, target path selection methods based on path delay at design phase and aging degradation have been proposed. They tend to select critical paths at design phase. However, these methods do not consider process variation caused when VLSIs are manufactured. In this paper, we propose a target path selection method based on process variation and aging degradation on an adaptive field testing. Experimental results for ISCAS'89 and ITC'99 benchmark circuits show that there exist such cases that paths which are not critical at design phase become critical after manufacturing due to process variation and aging degradation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | process variation / field test / path selection / aging degradation |
| Paper # | DC2011-10 |
| Date of Issue |
| Conference Information | |
| Committee | DC |
|---|---|
| Conference Date | 2011/6/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Dependable Computing (DC) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A study on path selection results of an adaptive field test with process variation and aging degradation for VLSI |
| Sub Title (in English) | |
| Keyword(1) | process variation |
| Keyword(2) | field test |
| Keyword(3) | path selection |
| Keyword(4) | aging degradation |
| 1st Author's Name | Satoshi KASHIWAZAKI |
| 1st Author's Affiliation | Graduate School of Industrial Technology, Nihon University() |
| 2nd Author's Name | Toshinori HOSOKAWA |
| 2nd Author's Affiliation | College of Industrial Technology, Nihon University |
| 3rd Author's Name | Masayoshi YOSHIMURA |
| 3rd Author's Affiliation | Graduate School of Information Science and Electrical Engineering, Kyushu University |
| Date | 2011-06-24 |
| Paper # | DC2011-10 |
| Volume (vol) | vol.111 |
| Number (no) | 100 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |